EU Consortium Developing Next-Gen Edge-AI Technologies Is Accepting Design Proposals

Coordinated by the EU’s four leading research and technology organizations (RTOs), France’s CEA-Leti, Germany’s Fraunhofer-Gesellschaft, Belgium-headquartered imec and Finland’s VTT, the PREVAIL project is a networked, multi-hub platform providing prototype chip fabrication capability in advanced artificial technology to EU stakeholders. In most cases, the technology offer will be based on commercial foundry processes, and advanced technology modules will be enhanced in the cleanrooms of the project partners.

“The PREVAIL project’s ultimate goal is to position Europe with an easy-access, advanced manufacturing infrastructure enabling users to make early research samples of innovative and trustworthy products and accelerate their commercialization,” said Sergio Nicoletti, CEA-Leti business development manager and PREVAIL project manager. “And while bringing their cutting-edge technologies to a higher maturity level and giving users the possibility to fabricate and test AI prototypes based on these technologies, the RTOs are reaping the benefits of technological cross-fertilization.”

“In addition to providing high-performance, low-power edge components and technologies to support the massive data-processing requirements of AI, the project will help energize the EU’s digital transformation, a precursor to the goals of the European Chips Act,” he said.

Launched at the end of 2022, the project is leveraging the RTOs’ advanced 300 mm fabrication, design and test facilities and related expertise to create the Testing and Experimentation Facility for Edge-AI Hardware (TEF Edge AI HW). This network will validate new high-performance, low-power, edge-AI components and support an infrastructure capable of fabricating early research prototype samples for testing in innovative edge-AI applications.

Nicoletti said the consortium is working with selected SMEs, the RTOs’ industrial partners and academic labs to prepare early designs that will be used to test fabrication equipment in the RTOs’ facilities. The project plans to open access widely for EU designers by May 2026.

While 80 percent of the project’s budget targets equipment suited for design, testing and fabrication of edge-AI devices, the project also will reinforce the readiness of the RTOs to equip their new pilot lines for developing 3D integration technologies, which also are envisioned in the chips act.

In addition to fabricating advanced edge-AI applications and creating the platform’s TEF Edge AI HW, the consortium will provide process design kits (PDKs) compatible with standard commercial CAD tools and all the elements necessary for full chip design. A user-interface team will manage relationships among the developers of next-generation, edge-AI solutions and the consortium.

PREVAIL is the EU’s first step to link the RTO’s different infrastructures and synchronize and coordinate their investments to minimize duplication, and to jointly increase the technology readiness levels (TRLs) of tools in development. The nearly €156 million ($169.3 million) cost of the 42-month project will be shared by the RTOs’ countries and the European Commission. Approximately 80 percent of this funding is CAPEX invested in new tools suited for edge-AI devices.

CEA: The French research organization in energy, defense & security, information technologies and health technologies is coordinator of the project.

CEA-Leti: The consortium is managed by CEA-Leti, which has about 11,000 m² of cleanroom space and 300 mm fabrication capabilities equipped with more than 150 tools to prototype advanced hardware. This specialty is supported by a nano-characterization platform specializing in physical-chemical characterization techniques.

Fraunhofer-Gesellschaft: Four Fraunhofer units in the Fraunhofer Group for Microelectronics and in the Research Fab Microelectronics Germany (FMD) are participating in the initial phase of the PREVAIL project: Fraunhofer IPMS’s Center Nanoelectronic Technologies (CNT), and Fraunhofer IZM-ASSID, the Center All Silicon System Integration Dresden, which will contribute with their 300 mm fabrication lines for CMOS compatible nanoelectronic technologies and advanced 3D wafer-level system integration. Fraunhofer EMFT will contribute chip-to-foil integration and physical analysis for trust, and Fraunhofer IIS will contribute by designing, measuring and testing CMOS integrated circuits enabled by its design and test experience in advanced semiconductor technologies down to 22nm.

Imec: With about 12,000 m² of cleanroom space, including a fully equipped 300 mm infrastructure, imec provides world-leading R&D on next-generation technology nodes serving the entire semiconductor ecosystem. The institute is applying its memory, 3D and photonics departments and unit process module department to help define PREVAIL’s technical offering.

VTT Technical Research Centre of Finland Ltd operates in several research fields. Its Microelectronics and Quantum Technology Division and the Safe and Connected Society unit are participating in the consortium’s work. With deep system and connectivity expertise, VTT enables the consortium to renew the connectivity testbed with the latest edge-computing development equipment tools and 5G evolution network technology updates.

For more information about CEA-Leti, go here.

For more information about Fraunhofer-Gesellschaft and FMD, go here .

For more information about imec, go here.

For more information about VTT, go here.

In addition to support from the European Commission, this work received funding from:

• the French National Research Agency as part of the France 2030 plan (ANR-22-PVIL-001)
• the Flemish Government (EWI department, project #VV023/11)
• the German Federal Ministry of Education and Research under the project reference number 16ME0834
• the Business Finland as part of the Finnish Sustainable Growth and Next Generation EU programs (decision 4614/31/2022)